Royal Sonesta Hotel
Cambrige, MA
Feb. 3, 2002
Compiling for Fine-Grain Concurrency: Planning and Performing Software Thread Integration
Alexander G.
Dean
Department
of
Sunghyun Jee, Chonan College in Foreign Studies
Kannappan Palaniappan, Department of CSCE, University of Missouri - Columbia
Youfeng Wu
Microprocessor Research Labs, Intel
Ronan Amicel,
and Francois Bodin
Wei Chung Hsu, Howard Chen, Pen Chung Yew
Department of Computer Science, University of Minnesota
Dong-Yuan Chen, Microprocessor Research Labs, Intel
Quantitative Evaluation of the Register Stack Engine and Optimizations for Future Itanium Processors
R. Dave Weldon, Steven S. Chang, Hong Wang, Gerolf Hoflehner, Perry Wang, and John Shen
Microarchitecture Research Labs, Intel
Jeonghun Cho, Jinhwan Kim, and Yunheung Paek
Department of EECS, Korea Advanced Institute of Science & Technology
Huiyang Zhou, and Thomas M. Conte
Department of ECE, North Carolina State University
Kelvin Lin, Jean Jyh-Jiun Shann, and Chung-Ping Chung
Department of CSIE, National Chiao Tung University
Kim Hazelwood, and Michael D. Smith
Division of Engineering and Applied Sciences, Harvard University